The present invention relates to a power converter apparatus.
Japanese Laid-Open Patent Publication No. 2005-347561 discloses a structure of a power converter apparatus having switching elements and capacitors, in which a portion of the capacitor interconnection member that corresponds to an external connection terminal is configured to reduce parasitic inductance of the interconnection. Specifically, as shown in FIGS. 17A and 17B, six insulated substrates 101 are provided on the upper surface of a base 100, and a collector pattern 102 and an emitter pattern 103 are formed on each insulated substrate 101. A switching chip 104 and a diode chip 105 are mounted on the collector pattern 102, and the switching chip 104 and the diode chip 105 are connected to the emitter pattern 103 by bonding wires 106. A P-type conductor 107 includes a plate-like main conductor 107a and three connecting conductors 107b projecting downward from the main conductor 107a. The P-type conductor 107 is connected to the insulated substrates 101 at the connecting conductors 107b. Likewise, an N-type conductor 108 includes a plate-like main conductor 108a and three connecting conductors 108b projecting downward from the main conductor 108a. The N-type conductor 108 is connected to the insulated substrates 101 at the connecting conductors 108b. The main conductors 107a, 108a are laminated together, while being insulated from each other. Belt-like sub-conductors 107c, 108c are provided at ends of the main conductors 107a, 108a, respectively. The sub-conductors 107c, 108c are laminated together, while being insulated from each other. The ends of the sub-conductors 107c, 108c form external connecting terminals P10, N10, respectively.
However, to reduce the parasitic inductance in the interconnection of the capacitor, it is not sufficient to provide an improved structure of the external connecting terminals P10, N1 in the capacitor interconnection member. Specifically, parasitic inductance in the interconnection needs to be reduced.